FreeCircuitSim
April 20269 min readBeginner

Logic Gates Explained

Logic gates are the fundamental building blocks of all digital electronics. Every computer, phone, and microcontroller is built from billions of these simple components. This guide explains each gate with truth tables and live simulations you can interact with.

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What is a Logic Gate?

A logic gate is an electronic circuit that takes one or two binary inputs (0 or 1, LOW or HIGH, false or true) and produces a single binary output according to a fixed rule. Physical gates are implemented using transistors — a modern CPU contains billions of them.

In simulation, logic gates are ideal: inputs are exactly 0V (LOW) or 5V (HIGH), and outputs switch instantly. In real digital circuits, small delays (propagation delay, typically 1–10 nanoseconds per gate) accumulate and limit maximum clock speeds.

The Six Fundamental Gates

AND Gate

Output = A AND B

Output is HIGH only when ALL inputs are HIGH. Like a series switch circuit — both switches must be closed for current to flow.

ABOut
000
010
100
111

OR Gate

Output = A OR B

Output is HIGH when ANY input is HIGH. Like a parallel switch circuit — either switch being closed allows current to flow.

ABOut
000
011
101
111

NOT Gate (Inverter)

Output = NOT A

Inverts the input. HIGH becomes LOW, LOW becomes HIGH. Single input only. The most basic logic building block.

AOut
01
10

NAND Gate

Output = NOT (A AND B)

AND followed by NOT. Output is LOW only when ALL inputs are HIGH. NAND gates are universal — any logic function can be built from NAND gates alone.

ABOut
001
011
101
110

NOR Gate

Output = NOT (A OR B)

OR followed by NOT. Output is HIGH only when ALL inputs are LOW. NOR gates are also universal — any logic function can be built from NOR gates alone.

ABOut
001
010
100
110

XOR Gate

Output = A XOR B (A different from B)

Output is HIGH when inputs are DIFFERENT. Used in arithmetic circuits (half adders) and parity checks.

ABOut
000
011
101
110
Simulate XOR Gate Simulate Half Adder

Logic Flow Diagrams

These diagrams show how signals flow through common logic gate combinations.

AND + OR Building a Selector

graph LR A["Input A"] --> AND1["AND Gate"] SEL["Select"] --> AND1 B["Input B"] --> AND2["AND Gate"] NSEL["¬ Select"] --> AND2 AND1 --> OR["OR Gate"] AND2 --> OR OR --> OUT["Output"] style OUT fill:#1a3a2a,stroke:#00ff88,color:#00ff88

D Flip-Flop from NAND Gates

graph LR D["D Input"] --> NAND1["NAND 1"] CLK["Clock"] --> NAND1 CLK --> NAND2["NAND 2"] NAND1 --> NAND3["NAND 3"] NAND2 --> NAND4["NAND 4"] NAND3 --> Q["Q Output"] NAND4 --> QB["Q-bar Output"] Q --> NAND4 QB --> NAND3 style Q fill:#1a3a2a,stroke:#00ff88,color:#00ff88 style QB fill:#3a1a1a,stroke:#ff4444,color:#ff4444

Common Beginner Mistakes

⚠️

Floating Inputs

In TTL and CMOS logic, unused inputs must never be left floating. They pick up noise and cause unpredictable output. Connect unused AND/NAND inputs to Vcc, unused OR/NOR inputs to GND.

⚠️

Mixing Logic Families

TTL (5V, 74xx series) and 3.3V CMOS (74LVC series) are not directly compatible. A 5V TTL output driving a 3.3V CMOS input can damage the chip. Use level-shifter ICs between different logic families.

⚠️

Exceeding Fan-Out

Each logic gate output can drive only a limited number of inputs (fan-out). For 74HC series, this is typically 10 gate inputs. Driving more causes the output voltage to sag out of valid logic levels.

⚠️

Clock Skew in Sequential Circuits

When building counters and registers, the clock signal must arrive at all flip-flops simultaneously. Long PCB traces delay the clock, causing different flip-flops to clock at different times — "clock skew" corrupts data.

Why Logic Gates Matter in 2026

While FPGAs and microcontrollers have replaced most discrete logic gate circuits in commercial products, understanding gates is fundamental to programming any digital system. Every if statement, every bitwise operation, every boolean expression in code directly maps to gate logic. FPGA development (Verilog, VHDL) requires explicit gate-level thinking. Digital circuit design for custom ASICs — a growing field in 2026 with the democratisation of chip design through tools like Google's OpenLane — is entirely based on gate logic optimisation.

Building More Complex Logic

By combining gates, you can build more sophisticated digital circuits. A half adder uses one XOR and one AND gate to add two 1-bit numbers, producing a sum and carry output. A full adder chains two half adders to handle a carry input as well.

Flip-flops (like the D flip-flop and JK flip-flop) are built from NAND or NOR gates and add memory to digital circuits — they store a single bit of information. Chains of flip-flops form registers and counters.

Simulate Full Adder Simulate D Flip-Flop

Logic Families — TTL vs CMOS

Real logic gates come in different families. TTL (7400 series) was the standard from the 1970s–1990s, operating at 5V with fast switching but relatively high power consumption. CMOS (4000 series, 74HC) uses complementary MOSFETs, operates over a wider voltage range (3V–15V), and consumes near-zero static power. Modern digital circuits are almost all CMOS.

The 74HC series (High-speed CMOS) combines CMOS efficiency with TTL-compatible 5V operation and fast switching speeds, making it the most common choice for new designs.

Frequently Asked Questions

Why are NAND and NOR gates called universal gates?
Any logic function can be implemented using only NAND gates (or only NOR gates). An AND gate = NAND + NOT. An OR gate = NAND with inverted inputs. A NOT gate = NAND with both inputs tied together. This universality made NAND gates economical in early IC manufacturing — one gate type could implement any logic.
What is the difference between a logic gate and a flip-flop?
Logic gates are combinational circuits — their output depends only on current inputs, with no memory. Flip-flops are sequential circuits — their output depends on both current inputs AND past state. Flip-flops store one bit of information and are the basic memory element in digital systems.
Can I simulate CMOS logic gates in the browser?
Yes. FreeCircuitSim includes CMOS inverter, NAND, NOR, and XOR gate implementations built from MOSFET transistors, so you can see exactly how CMOS logic works at the transistor level.
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